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 BSC600N25NS3 G
OptiMOSTM3 Power-Transistor
Features * N-channel, normal level * Excellent gate charge x R DS(on) product (FOM) * Very low on-resistance R DS(on) * Pb-free lead plating; RoHS compliant * Qualified according to JEDEC1) for target application * Halogen-free according to IEC61249-2-21
Product Summary V DS R DS(on),max ID 250 60 25 V m A
* Ideal for high-frequency switching and synchronous rectification Type BSC600N25NS3 G
Package Marking
PG-TDSON-8 600N25NS
Maximum ratings, at T j=25 C, unless otherwise specified Parameter Continuous drain current Symbol Conditions ID T C=25 C T C=100 C Pulsed drain current2) Avalanche energy, single pulse Gate source voltage Power dissipation Operating and storage temperature IEC climatic category; DIN IEC 68-1
1) 2)
Value 25 16 100 210 20
Unit A
I D,pulse E AS V GS P tot T j, T stg
T C=25 C I D=25 A, R GS=25
mJ V W C
T C=25 C
125 -55 ... 150 55/150/56
J-STD20 and JESD22 See figure 3
Rev. 2.3
page 1
2009-10-23
BSC600N25NS3 G
Parameter
Symbol Conditions min.
Values typ. max.
Unit
Thermal characteristics Thermal resistance, junction - case Thermal resistance, junction ambient R thJC R thJA minimal footprint 6 cm2 cooling area 3) 1 75 50 K/W
Electrical characteristics, at T j=25 C, unless otherwise specified Static characteristics Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current V (BR)DSS V GS=0 V, I D=1 mA V GS(th) I DSS V DS=V GS, I D=90 A V DS=200 V, V GS=0 V, T j=25 C V DS=200 V, V GS=0 V, T j=125 C Gate-source leakage current Drain-source on-state resistance Gate resistance Transconductance I GSS R DS(on) RG g fs |V DS|>2|I D|R DS(on)max, I D=25 A V GS=20 V, V DS=0 V V GS=10 V, I D=25 A 250 2 3 0.1 4 1 A V
25
10 1 50 2.5 49
100 100 60 nA m S
3) 2 Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm (one layer, 70 m thick) copper area for drain connection. PCB is vertical in still air.
Rev. 2.3
page 2
2009-10-23
BSC600N25NS3 G
Parameter
Symbol Conditions min.
Values typ. max.
Unit
Dynamic characteristics Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Gate Charge Characteristics 4) Gate to source charge Gate to drain charge Switching charge Gate charge total Gate plateau voltage Output charge Reverse Diode Diode continous forward current Diode pulse current Diode forward voltage Reverse recovery time Reverse recovery charge
4)
C iss C oss C rss t d(on) tr t d(off) tf V DD=100 V, V GS=10 V, I D=12 A, R G=1.6 V GS=0 V, V DS=100 V, f =1 MHz
-
1770 112 3 10 10 22 8
2350 149 -
pF
ns
Q gs Q gd Q sw Qg V plateau Q oss V DD=100 V, V GS=0 V V DD=100 V, I D=12 A, V GS=0 to 10 V
-
8 2 5 22 4.3 45
29 60
nC
V nC
IS I S,pulse V SD t rr Q rr
T C=25 C V GS=0 V, I F=25 A, T j=25 C V R=125 V, I F=12 A, di F/dt =100 A/s
-
0.9 114 700
25 100 1.2
A
V ns
-
nC
See figure 16 for gate charge parameter definition
Rev. 2.3
page 3
2009-10-23
BSC600N25NS3 G
1 Power dissipation P tot=f(T C)
2 Drain current I D=f(T C); V GS10 V
140
30
120
100 20
P tot [W]
80
60 10 40
20
0 0 50 100 150 200
I D [A]
0 0 50 100 150 200
T C [C]
T C [C]
3 Safe operating area I D=f(V DS); T C=25 C; D =0 parameter: t p
103
4 Max. transient thermal impedance Z thJC=f(t p) parameter: D =t p/T
102
10 s 100 s
1 s
100
Z thJC [K/W]
0.5
I D [A]
101
1 ms
0.2 0.1
10 ms
10-1
0.05 0.02
100
DC
0.01 single pulse
10-1 10
-1
10-2 10
0
10
1
10
2
10
3
10-5
10-4
10-3
10-2
10-1
100
V DS [V]
t p [s]
Rev. 2.3
page 4
2009-10-23
BSC600N25NS3 G
5 Typ. output characteristics I D=f(V DS); T j=25 C parameter: V GS
60
10 V
6 Typ. drain-source on resistance R DS(on)=f(I D); T j=25 C parameter: V GS
100
7V
50 80
5V 4.5 V 5V
40
R DS(on) [m]
60
7V 10 V
I D [A]
30
40
20
4.5 V
20 10
0 0 1 2 3 4 5
0 0 10 20 30
V DS [V]
I D [A]
7 Typ. transfer characteristics I D=f(V GS); |V DS|>2|I D|R DS(on)max parameter: T j
50
8 Typ. forward transconductance g fs=f(I D); T j=25 C
80
70 40 60
30
50
g fs [S]
20 10
150 C 25 C
I D [A]
40
30
20
10
0 0 2 4 6 8
0 0 10 20 30 40 50
V GS [V]
I D [A]
Rev. 2.3
page 5
2009-10-23
BSC600N25NS3 G
9 Drain-source on-state resistance R DS(on)=f(T j); I D=25 A; V GS=10 V
10 Typ. gate threshold voltage V GS(th)=f(T j); V GS=V DS parameter: I D
180 160 140
4
3.5
900 A
3 120
90 A
R DS(on) [m]
2.5 100 80 60 40 20 0 -60 -20 20 60 100 140 180
V GS(th) [V]
typ
2
98%
1.5
1
0.5
0 -60 -20 20 60 100 140 180
T j [C]
T j [C]
11 Typ. capacitances C =f(V DS); V GS=0 V; f =1 MHz
12 Forward characteristics of reverse diode I F=f(V SD) parameter: T j
104
103
Ciss
103 102
Coss
25 C
C [pF]
10
2
I F [A]
150 C 25C, 98%
101 101
Crss
150C, 98%
100 0 40 80 120 160 0 0.5 1 1.5 2
V DS [V]
V SD [V]
Rev. 2.3
page 6
2009-10-23
BSC600N25NS3 G
13 Avalanche characteristics I AS=f(t AV); R GS=25 parameter: T j(start)
100
14 Typ. gate charge V GS=f(Q gate); I D=12 A pulsed parameter: V DD
10
8
200 V
25 C
6
125 V
V GS [V]
I AS [A]
10
100 C
50 V
4
125 C
2
1 1 10 100 1000
0 0 5 10 15 20 25
t AV [s]
Q gate [nC]
15 Drain-source breakdown voltage V BR(DSS)=f(T j); I D=1 mA
16 Gate charge waveforms
280
V GS
270
Qg
260
V BR(DSS) [V]
250
V g s(th)
240
230
Q g(th) Q gs
-60 -20 20 60 100 140 180
Q sw Q gd
Q g ate
220
T j [C]
Rev. 2.3
page 7
2009-10-23
BSC600N25NS3 G
PG-TDSON-8: Outline
Rev. 2.3
page 8
2009-10-23
BSC600N25NS3 G
Published by Infineon Technologies AG 81726 Munich, Germany (c) 2009 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office ( www.infineon.com). on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
Rev. 2.3
page 9
2009-10-23


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